Projects
Projects in analog IC design, digital design and verification, embedded systems and PCB, and neuromorphic research.
Analog IC
Two-Stage Miller-Compensated Op-Amp
Transistor-level two-stage op-amp with Miller compensation and current-mirror biasing, designed and simulated in Cadence Virtuoso.
- Cadence Virtuoso
- ADE
- SPICE simulation
Analog IC
StrongARM Latch Comparator
Clocked StrongARM latch comparator with an SR-latch output stage, designed in Cadence Virtuoso and characterized for delay and power.
- Cadence Virtuoso
- ADE
- SPICE simulation
Analog IC · Digital & Verification
64×8 6T SRAM Array Design and Characterization
Six-transistor SRAM array in Cadence Virtuoso with precharge, sense amplifier, write driver and row decoder, characterized across PVT corners.
- Cadence Virtuoso
- SPICE simulation
- PVT corner analysis
Digital & Verification
UVM Verification Environment for a Parameterized Synchronous SRAM
SystemVerilog UVM testbench with driver, monitor, agent, scoreboard and functional coverage for a configurable single-port SRAM with byte enables.
- SystemVerilog
- UVM
- functional coverage
Digital & Verification
AXI4-Lite Slave Verification Environment with SVA Protocol Checks
UVM environment for an AXI4-Lite slave with constrained-random tests, error injection and SVA checks verified against the Vivado AXI Verification IP.
- SystemVerilog
- UVM
- SVA
- AMD Vivado
- +1 more
Digital & Verification
RV32I Pipelined Core with C++ Reference Model Co-Simulation
Five-stage RISC-V RV32I processor with forwarding and hazard detection, checked instruction by instruction against a self-written C++ simulator.
- RISC-V (RV32I)
- RTL design
- C++
- randomized testing
Digital & Verification
Sv32 Address Translation Unit: Synthesis and Place-and-Route
Sv32 page-table walker with a 16-entry TLB and AXI-based PTE fetching, taken through Cadence Genus synthesis and Innovus place-and-route.
- RTL design
- Cadence Genus
- Cadence Innovus
- AXI
Embedded & PCB
H-Bridge Motor Driver: Circuit Simulation and PCB Design
Full H-bridge motor driver with MOSFET switching, PWM speed control and flyback protection, simulated in Proteus and laid out in KiCad.
- KiCad
- Proteus
- PWM
- MOSFETs
- +1 more
Embedded & PCB
48 V Fail-Safe Relay Lockout Controller
Isolated relay controller with a protected 48 V input front-end that inhibits vehicle operation on an interlock condition, designed in KiCad.
- KiCad
- Proteus
- ESP32-C3-WROOM-02
- STM32
- +2 more
Embedded & PCB
Half-Duplex RS-485 to UART Bridge with Modbus RTU
MAX485-based bridge between a UART and a half-duplex RS-485 bus, sending hand-built Modbus RTU FC03 requests without a protocol library.
- MAX485
- UART
- RS-485
- Modbus RTU
Embedded & PCB
ATtiny85 External Hardware Watchdog
Bare-metal AVR C watchdog on an ATtiny85 that supervises an ESP32-C3 IoT node through digital heartbeat pulses.
- ATtiny85
- AVR C
- AVR programmer
- external interrupts
- +2 more
Embedded & PCB
Modbus TCP to MQTT Gateway with Live Web Dashboard
Gateway that polls a Siemens PAC3200 power meter over Modbus TCP and republishes the data to MQTT, with a Python dashboard that sends commands back.
- Modbus TCP
- MQTT
- TCP/IP
- Arduino Ethernet
- +3 more
Embedded & PCB
2.4 GHz RF Remote-Controlled Car
Arduino-based car driven over a 2.4 GHz nRF24L01 radio link, with a joystick mapped to motor direction and speed commands.
- Arduino
- ESP32
- nRF24L01
- SPI
- +1 more
Research
Spiking Neural Network for Neuromorphic Classification of Environmental Sound
Biologically inspired spiking network that classifies environmental sound from STFT spectrograms using event-based keypoint encoding.
- Python
- Jupyter
- STFT
- spiking neural networks